Introduces software/hardware codesign for modern all-programmable system on chip platforms. Covers profiling, design partitioning, interfacing, debugging using integrated logic analyzers, and optimizing performance and resource utilization. Demonstrates the development of hardware accelerators using existing intellectual property cores and establishing efficient communication between software and hardware parts of complex embedded systems. Introduces high-level synthesis for improved efficiency of the development process. Offered by Electrical & Comp. Engineering. May not be repeated for credit.
George Mason University
Electrical & Computer Engineering
Times and Days
ECE 511 and 545, or permission of instructor